From Silicon to Solver: Reverse Engineering Jane Street's GDSII Puzzle Chip

Jane Street's 2026 puzzle shipped only a GDSII layout file, the physical mask format normally used to fabricate silicon, hiding a digital circuit that checks an 11x11 Star Battle puzzle. Solving it required rebuilding the design from raw polygons back up to a verifiable state machine.

The author treated the layout as compiler output and reversed each stage in turn: standard-cell footprints were matched against the open sky130 PDK using geometric XOR across all rotations and mirrors, recovering 69 cell definitions with zero ambiguity. Metal and via tracing then rebuilt a full netlist of 722 logic instances - 630 gates and 92 flip-flops - cross-checked two ways, via Liberty-file Boolean functions proven with z3 and via transistor-level truth-table extraction, before replaying a reference VCD trace and feeding the model to yosys/ABC for bounded model checking to find the accepted serial input.

Why it matters: the writeup is a practical playbook for netlist extraction and hardware reverse engineering - cell-library matching, connectivity repair heuristics, and graph-based state-machine recovery - useful for security researchers and verification engineers auditing black-box silicon without source RTL.