New Verification Gate Catches AI Models' Silent Omissions
A layered verification gate now catches AI models that silently skip claims they should surface, splitting omission into checkable failure states.
A memory verification system built to catch AI models misrepresenting sources hit a fundamental limit: it could flag false claims but not detect when a model silently skipped a claim it should have surfaced. Because omission leaves no trace, it looked identical to clean compliance.
A community-driven discussion produced a fix: a 'considered-set' gate that requires the proposer to declare, upfront, which surfaces it inspected before making claims. This splits silence into two checkable states — a declared negative ('I looked, nothing changed') versus a genuine gap (a surface missing entirely from the declared set). The system now runs six alarm codes, including one for proposers that author their own evaluation criteria and effectively grade their own homework.
Adversarial test cases showed the gate resists decoy-flooding and self-authored expected-sets, but it doesn't eliminate the possibility of fabricated declarations, and the list of required surfaces still comes from fixed test cases rather than being derived automatically from raw events in production — an unsolved step before real deployment.
For engineers building audit or compliance layers on top of LLM outputs, this offers a concrete architecture pattern: don't just check what a system says, check whether it explicitly declares what it checked, and treat the gap between the two as a distinct, more serious failure mode.